The present invention relates to double diffused MOS (DMOS) field effect transistors and, in particular, to a DMOS transistor structure that utilizes a gate electrode trench suitable for high-density integration with mixed signal analog and digital circuit applications, and to a method of fabricating the DMOS transistor structure.
DMOS field effect transistors are typically used for power devices that require a high voltage and fast switching. DMOS devices are fabricated utilizing a double diffusion process to form a P-type body region and an N-type high-density source region by implanting ions through a window defined by a polysilicon gate.
In conventional DMOS transistor structures, the surface area occupied by the polysilicon gate electrode limits the DMOS cell density. Thus, it would be desirable to have a DMOS transistor structure with reduced gate electrode surface area.
The present invention provides a DMOS transistor that uses a gate electrode trench, making the device suitable for high-density integration with mixed signal analog and digital circuit applications. The device can be added to any advanced CMOS process using shallow trench isolation (STI) by including additional process steps for formation of a gate trench trough, a trench implant and a P-body implant. The gate trench trough and trench implant provide a novel method of forming the drain extension of a high-voltage DMOS device.
The features and advantages of the present invention will be more fully appreciated upon consideration of the following detailed description of the invention and the accompanying drawings, which set forth an illustrative embodiment in which the principles of the inventions are utilized.